[dorkbotsea-blabber] Electronic Logic Design Help: Why
TwoInverters In Series?
John Miles
jmiles at pop.net
Fri Sep 21 18:37:34 EDT 2007
I'll take a guess at it. In any kind of high-current bridge circuit like
this one, one of the more Important Safety Tips is that you can never allow
both halves of the totem pole to be turned on at once, because that'll short
the power supply. With a fast-rising edge that conforms to the expected
logic levels, your 'expected' circuit would probably be fine. The power
rails miight be shorted for a few nanoseconds while Input 1 underwent a
low->high transition before the control signal could make through the
inverter to the complementary input, but since that timescale is shorter
than the response of the H-bridge driver itself, no harm/no foul.
But if you sent a slowly-rising edge into the control line, if any
electrical noise were present, or if the control signal level were marginal
for one chip's input but not the other's, it's possible that Input 2 and
Input 1 could both go high for a significant period of time... meaning, long
enough to let the smoke out of something. By using inverters from the same
logic family (and most likely the same physical package) in both input
lines, the circuit in the data sheet does a better job at enforcing the
Input_1 = NOT Input_2 condition at all times.
Most likely, the circuit would work fine with only one inverter, especially
if you're driving it from a CMOS-output microcontroller that's only a few
inches away. The authors of the data sheet didn't know that, so they took
the safe way out.
You can generally drive TTL directly from CMOS. The opposite may not work
reliably without pullup resistors or additional buffers, unless the TTL
output is from a CMOS-compatible family.
-- john
-----Original Message-----
From: dorkbotsea-blabber-bounces at music.columbia.edu
[mailto:dorkbotsea-blabber-bounces at music.columbia.edu]On Behalf Of Claude
Andrew
Sent: Friday, September 21, 2007 3:04 PM
To: dorkbotsea-blabber at music.columbia.edu
Subject: [dorkbotsea-blabber] Electronic Logic Design Help: Why
TwoInverters In Series?
Importance: Low
I've built a couple of stepper motor controllers by copying other people's
designs and, flush with success, I am designing my own... kinda.
There's a circuit snippet for an H-Bridge driver
(http://focus.ti.com/lit/ds/symlink/sn754410.pdf) that shows two control
inputs hooked up with two inverter (NOT) gates. I understand that
(typically) one would want one of the inputs to be NOT the other... but why
do they use TWO inverters?
They have:
----Control----[NOT GATE]--+---------------->Input 1
|
+--[NOT GATE]---->Input 2
While I would have expected:
----Control----------------+---------------->Input 2
|
+--[NOT GATE]---->Input 1
I can probably just copy it, but I'd really like to understand why they
did it this way in case i am totally misunderstanding something.
Speaking of misunderstanding, I have spent the last two days trying to
pick an inverter. It sounded so simple. Of the two H-Bridge chips I'm
looking at, one claims to be TTL inputs and the other TTL & CMOS. I'm using
PIC Micro 16- and 18-series devices for the controller, but I don't want to
use more IO pins that I have to. After much wikisearch I think that this
might do the job for all my glue logic needs:
ST 74ACT04 "designed to interface directly High Speed CMOS systems with
TTL, NMOS and CMOS output voltage levels"
http://www.st.com/stonline/books/pdf/docs/5079.pdf
Can anyone tell me if this is OK or what I should use instead?
Thanks in advance,
Claude
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