[music-dsp] Is the 21061 fast enough? Question #2

zaphodb zaphodb at casema.net
Thu Aug 31 12:01:25 EDT 2000


Hi,

> on the 21061 (sharc) you can read the emuclk and emuclk2 registers,
> which is essentially a 64bit counter running at core clock speed (33
> or 40Mhz). "emuclk" is the LSB part or the lower 32 bits of this
> counter. this way you can count the cycles you need for your algo.

I will take a look at the counters, thanks!

I'm using a skeleton program that I found in the sharc ez-lite kit to write
my program.
For debugging purposes I've added a (very) small key parser in the main
routine:

/* ADSP-2106x System Register bit definitions */
#include <def21060.h>
#include <21060.h>
#include <signal.h>
#include <sport.h>
_tcb rx_tcb = {0, 0, 0, 0, 0, 0, 3, 1, 0};      /* receive tcb */
_tcb tx_tcb = {0, 0, 0, 0, 0, 0, 3, 1, 0};      /* transmit tcb */

int cmd_blk[8];                                 /* command block */

static int xmit_count;
static int * xmit_ptr;

void spr0_asserted( int sig_num )
{
  if (bypass < 0)
  {
    tx_buf[LEFT] = rx_buf[LEFT];
    tx_buf[RIGHT] = rx_buf[RIGHT];
    return;
 }
 else
    do_some clever_filtering();
}

void main ( void )
{
  int x, i, j, bypass = -1;

  // Loop forever.
  while(c!=27)
  {
    c=getch();
    switch(c)
    {
          case 48: // bypass
          {
            bypass = -bypass;
            if (bypass < 0)
               printf("Bypass off\n");
           else
               printf("Bypass on\n");
           break;
          }
          default:
         {
               printf("Key %d is not used.\n", c);
               break;
         }
   }
   idle();
  }
}


What are the cost of such a debug loop?
The communication between the sharc and the pc is relatively slow,
so is this slowing down the sharc?
Where is the parsing done? Is this done by the sharc or the pc?

Greetings,

Zaphod.


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